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DHRUV64 Boosts India’s Indigenous Microprocessor Ambitions

Why in the News?

The Ministry of Electronics and Information Technology (MEITY) announced the launch of DHRUV64, a fully indigenous 64-bit microprocessor, positioning it as a key step towards self-reliance in semiconductor design and strengthening India’s domestic processor ecosystem. This development comes with the need for ex post facto environmental clearances for semiconductor manufacturing facilities.

What is DHRUV64 and Why It Matters:

  • DHRUV64 is a 64-bit, dual-core microprocessor developed by the Centre for Development of Advanced Computing (C-DAC) under MEITY’s Microprocessor Development Programme.
  • Clocked at 1 GHz, it is designed as a general-purpose processor capable of running modern operating systems, while remaining efficient for embedded and industrial applications.
  • The chip targets use cases such as telecommunications infrastructure, industrial automation, routers, automotive modules, and control systems, where reliability and integration matter more than peak performance.
  • India is a major consumer of processors but remains dependent on imported designs and supply chains, making DHRUV64 strategically significant for technological sovereignty.
  • By developing a homegrown processor, India seeks greater control over security assumptions, software updates, and resilience against export controls or global supply disruptions.
  • However, DHRUV64’s performance is modest compared to cutting-edge consumer processors, meaning its success will depend on ecosystem support rather than raw speed.

Ecosystem of Indigenous Processors and DIR-V Programme

  • DHRUV64 is part of India’s broader processor ecosystem, alongside SHAKTI (IIT Madras), AJIT (IIT Bombay), VIKRAM (ISRO–SCL), and THEJAS64 (C-DAC).
  • These processors cater to strategic sectors, including defence, space, industrial control, and critical infrastructure.
  • DHRUV64 is aligned with the Digital India RISC-V (DIR-V) programme, which promotes RISC-V, an open instruction set architecture with no licensing fees.
  • RISC-V’s modular nature allows designers to customise chips while maintaining a common base, making it attractive for governments and research institutions.
  • Earlier DIR-V chips include THEJAS32 (fabricated in Malaysia) and THEJAS64 (fabricated at SCL Mohali).
  • MEITY has not disclosed where DHRUV64 was fabricated, raising questions about the manufacturing supply chain and potential environmental impact.

Key points: Gaps, Roadmap and Government Schemes
● Unanswered Questions: MEITY has not released details on benchmarks, memory architecture, power efficiency, security features, or foundry and process node, limiting assessment of readiness.
● The claim of being “fully indigenous” remains ambiguous, as indigenisation can span design, IP, toolchains, fabrication, and ownership.
● Future Roadmap: C-DAC plans next-generation chips—DHANUSH (1.2 GHz, quad-core, ~28 nm) and DHANUSH+ (2 GHz, quad-core, 14–16 nm).
● Key Government Schemes:
○ Chips to Startup Programme (₹250 crore, five years)
○ Design Linked Incentive (DLI) Scheme
○ INUP-i2i Initiative for nanofabrication access
● Under the India Semiconductor Mission, projects worth ₹1.6 lakh crore across six States have been approved.
● Collectively, these efforts aim to ensure that Indian chips become commercially viable, trusted, and competitive while adhering to environmental regulations and the Forest Conservation Act.